According to high integration and high densification of semiconductor devices, a circuit wiring has recently been gradually further microfabricated, and the number of layers of multi-layered wirings has also gradually increased. When it is intended to implement multi-layered wirings while achieving the microfabrication of a circuit, a step is increased following the unevenness on the surface of an under layer. Thus, a film coatability for a step shape (step coverage) is deteriorated in forming a thin film as the number of wiring layers is increased. Accordingly, in order to form multi-layered wirings, it is necessary to improve the step coverage, and perform a flattening treatment in a proper process. In addition, because a focal depth becomes swallower as fineness is improved in optical lithography, it is necessary to perform a flattening treatment on the surface of a semiconductor device in order to ensure that a concavo-convex level difference on the surface of the semiconductor device does not exceed the focal depth.
Accordingly, flattening techniques of the surface of a semiconductor device have become increasingly important in a manufacturing process of the semiconductor device. Among the flattening techniques, the most important technique is a chemical mechanical polishing (CMP). The CMP performs polishing using a polishing apparatus by causing a substrate (e.g., a semiconductor wafer) to be in slide contact with a polishing pad while supplying a polishing liquid (slurry) containing abrasive grains of silica (SiO2), ceria (CeO2), or the like to the polishing pad.
A CMP apparatus is used in a process of polishing the surface of a substrate in manufacturing a semiconductor device. The CMP apparatus polishes the surface of the substrate by holding and rotating the substrate by a top ring, and pushing the substrate against a polishing pad on a rotating polishing table. During the polishing, a polishing liquid (slurry) is supplied to the polishing pad, and the surface of the substrate is flattened by the chemical action of the polishing liquid and the mechanical action of the abrasive grains contained in the polishing liquid.
The polishing rate of the substrate also relies on the surface temperature of the polishing pad in addition to the polishing load of the substrate with respect to the polishing pad. This is because the chemical action of the polishing liquid for the substrate relies on the temperature. Accordingly, in manufacturing a semiconductor device, it becomes important to keep the surface temperature of the polishing pad at an optimum value during the polishing of the substrate in order to increase the polishing rate of the substrate and keep the polishing rate of the substrate more uniformly.
For that reason, in Japanese Patent Laid-Open Publication No. 2012-176449, the assignee of the present application previously proposed a polishing apparatus that is provided with a pad temperature control mechanism that controls the surface temperature of a polishing pad by supplying a temperature-controlled liquid to a pad contact member that comes in contact with the surface of the polishing pad.
The pad contact member proposed in Japanese Patent Laid-Open Publication No. 2012-176449 is formed in a planar body having a liquid flow path therein, and a plurality of baffles is arranged in the liquid flow path within the planar body to form a zigzag flow path. The pad contact member is formed of a material having a high thermal conductivity (e.g., silicon carbide (SiC)) in order to transfer heat from the temperature-controlled liquid flowing in the liquid flow path to the surface of the polishing pad as much as possible without causing the waste of heat.